63E1 and STM-1
The process of multiplexing 2Mbit/s signals into STM-1 can be described as follows…
The process of multiplexing 2Mbit/s signals into STM-1 can be described as follows:
The 2048kbit/s signal is first asynchronously loaded into container C-12 via positive/zero/negative justification, then mapped into virtual container VC-12, and subsequently adjusted through the tributary unit pointer TU-12 PTR to achieve phase alignment. Three TU-12s are synchronously multiplexed via byte interleaving to form a tributary unit group TUG-2; seven TUG-2s are synchronously multiplexed to form TUG-3; three TUG-3s are synchronously multiplexed to form a higher-order virtual container VC-4; after AU-4 PTR adjustment, an administrative unit group AUG is formed, and finally, with the addition of section overhead, the STM-1 frame is generated.
From 2Mbit/s multiplexing into the STM-1 signal, three TU12s are multiplexed into one TUG2, seven TUG2s are multiplexed into one TUG3, three TUG3s are multiplexed into one VC4, and one VC4 is multiplexed into one STM-1. The multiplexing structure from the 2Mbit/s signal into STM-1 is a 3-7-3 structure. STM-1 can accommodate 3×7×3=63 2Mbit/s signals, which is the origin of the commonly referred to 63E1.
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